Neal Tibrewala
Neal@Tibrewala.net
 5610 Grover Ave. 
Austin, TX 78756 
(512) 553-5370 
Work Experience

Independent Computer Consultant, 1989 - Present
Prestile Solutions, LLC (http://www.prestilesolutions.com) - Austin, TX

Data Platform Engineer, 2020
Tri-AD (Woven) - Tokyo, Japan

  • Helped develop the real-time data integration platform for Toyota's self-driving cars
  • AWS, Terraform, ECS, Kotlin, Lambda Functions, S3

Chief Technical Officer, 2017 - 2019
Puzzled Pint, LLC - Portland, OR

  • Angular SPA development, serverless on Google Firebase
  • Stripe, PrimeNG, TravisCI, Cypress.io Testing, Service Workers

Chief Technical Officer, 2007 - 2017
L5 Software Group (http://www.l5sg.com) - Austin, TX

Various subcontracting projects with various clients:

  • Network security, e-mail, and administration servers and infrastructure
  • Enterprise Data Mining and Analytics Web Application Development
  • Enterprise network and database application maintanence, upgrades, and deployment
  • Enterprise desktop product re-architecture, re-design, and improvement
  • Web site performance, load, and stress testing and tuning
  • Background Witness testimony for patent litigation suits

Director of Engineering, 2005 - 2007
Lytix (http://www.lytix.com) - New York, NY

  • Fully responsible for the requirements, design, and development of a patent-pending financial knowledgebase with accompanying data and visualization tools.
  • Managed a small development team
  • Responsible for production support, maintenance, and upgrades of the software
  • Responsible for all IT infrastructure, servers, security, and telecom for 10+ remote, geographically disparate remote employees
  • Created a standalone VMWare Virtual Appliance to act as a multi-node distributed application

Technical Consultant, 1999 - 2003
Digital Envoy (http://www.digitalenvoy.net) - Atlanta, GA
Research & Development Team

Worked remotely with a team to design and develop several large-scale (150M+ records) database products.

Specific projects include:

  • Creating a fast custom database software package and multi-level distributed server hierarchy capable of returning queries of our large databases to web servers in under 100us
  • Developing automated tools to scan the thousands of servers and over 100 million active hostnames on the internet.
  • Finding novel (patent-pending) methods  to determine the geographical locations of specific IP addresses
  • Designing tools to test and benchmark the accuracy, speed, and reliability of the servers and tools
  • Data mining tools to analyze millions of Whois records
  • Artificial Intelligence routines to determine geography of unknown addresses
  • Creating database products using Oracle's embedded SQL in Perl and ProC/C++
Engineering CO-OP, 5/97 - 12/97, 5/98 - 8/98
Intel Corp. (http://www.intel.com) - Folsom, CA
System Validation Group

Worked with a team to design test plans, new hardware, software, and firmware to test the LPC bus on the PiiX6 and Camino ICH "south bridge" chipsets.  Skills acquired include detailed knowledge of ISA and other system busses, PCI/LPC test card design and debug, i960 based embedded firmware code to support smart testing and auto data validation, and industry-scale chip testing methodologies

Technical Consultant, 1993-1996
CMP Media, Inc. (http://www.cmp.com) - Manhasset, NY

Projects

  • Member of the team that launched Techweb (http://www.techweb.com)
  • Member of the team that launched CMP's Intranet 
  • Helped create and maintain CMP's AOL & MSN sites
  • Created a web auditing automation database 
  • Created a web advertising and tracking system 
  • Converted legacy document database from ATEX to QPS SGML/HTML
  • Created On-line document delivery automation tools
Teaching Experience Adjunct Professor, 2002
New York Institute of Technology (http://www.nyit.edu) 
Computer Science Department

PhD Teaching Internship, 2001 
Special Topics in Computer Engineering: Hardware-Software Codesign for System on a Chip (http://www.ece.cmu.edu/~cosim/849b)
Carnegie-Mellon University
Department of Electrical & Computer Engineering
Education Carnegie Mellon University (http://www.cmu.edu) - Pittsburgh, PA
GPA 3.97

(incomplete) Ph.D. Electrical & Computer Engineering (http://www.ece.cmu.edu)

Carnegie-Mellon Center Silicon System Implementation (http://www.ece.cmu.edu/~cssi)
working under Don Thomas and JoAnn Paul.

M.S. Electrical & Computer Engineering (Dec 1999)

Carnegie-Mellon Laboratory for Computer Systems (http://www.lcs.ece.cmu.edu) and Parallel Data Lab (http://www.pdl.cmu.edu) working under Greg Ganger
  • Systems Of Active Components
  • High-Performance Servers (e.g. HTTPD)
  • Server Operating Systems
  • Intelligent Network Cards
  • High-Performance Storage Networks (SANs)

B.S. Electrical & Computer Engineering (May 1998)
Minor: Computer Science (http://www.cs.cmu.edu) 
   
Computer Skills Software
  • C, C++, C#, Java, Small, Perl, Python, Ruby, Pascal, VB, ML, LISP, PL/SQL, Fortran, assembly language
  • Networked (Client/Server) Application Development (Web Services, Remoting, Sockets)
  • Database application development in Oracle (OCI, ProC/C++), MS-Access, PostgreSQL, MySQL, Firebird/Interbase, db4Objects, and several custom databases
  • Embedded Software Application Coding
  • Operating Systems, Device Driver and Network Systems Programming
  • Web Site Design (Custom CGI,  Frontpage, Dreamweaver)
  • Real-time systems programming and design (TTP, Statemate)
  • Extensive Windows, Unix (SunOS, BSD), Linux (Redhat, Debian, Gentoo, Slackware), DOS, and Apple Macintosh Administration Experience
  • Server and Network Security and reliability
  • Content and Document Management tools (Alfresco, Samba, Joomla)
  • Virtual Machines (VMWare, Parallels)
  • Software Project Management Experience (Spiral, Agile, FDD, XP)
    •
Hardware
  • Network Architectures
  • Cadence Development Suite
  • Microprocessor and Real-Time System Design
  • Verilog & VHDL Computer Aided Design
  • x86, 68k, i960, MIPS, HC11, and ARM7 processors
  • Altera FLEX 8K & 10K FPGA synthesis using Synopsys
  • Xilinx 4028EX FPGA synthesis using Synplify
  • C++ Driver-level library creation to support PCI, DMA, Interrupts and other system level functions
   
Research & Publications

U.S. Patent #20140019961 A1 "System and Method for Automated Assignment of Virtual Machines and Physical Machines to Hosts"

U.S. Patent #20140019964 A1 "System and Method for Automated Assignment of Virtual Machines and Physical Machines to Hosts using Interval Analysis"

U.S. Patent #20140019965 A1 "System and Method for Automated Assignment of Virtual Machines and Physical Machines to Hosts with Right-Sizing"

U.S. Patent #20140019966 A1 "System and Method for Continuous Optimization of Computing Systems with Automated Assignment of Virtual Machines and Physical Machines to Hosts"

U.S. Patent #(Pending) "System and Method for Providing a Graphical Representation of Corporate Data"

U.S. Patent #6757740 "Systems and Methods for Determining, Collecting, and Using Geographic Locations of Internet Users.", 6/29/04 (link)

Neal K. Tibrewala, JoAnn M. Paul, and Donald E. Thomas, Modeling and Evaluation of Hardware/Software Designs, International Workshop on Hardware/Software Co-Design, April 2001 (http://www.tibrewala.net/papers/codes01.pdf)

Robert Slater, Neal Tibrewala, "Optimizing the MESI Cache Coherence Protocol for Multithreaded Applications on Small Symmetric Multiprocessors", Dept. of Electrical & Computer Engineering, Carnegie-Mellon University, May 1998
(http://www.tibrewala.net/papers/mesi98)